Friday 5
Plasma-Based Ion Assisted Deposition and Pulsed Power Deposition
R. Wei, X.Y. Liu
› 9:15 - 9:35 (20min)
› IFMI Amphitheatre
Strain-relaxed SiGe layer on Si formed by PIII&D technology
Seunghee Han  1@  , Sun-Woo Moon, Sung-Min Kim, Kyung-Hun Kim, Jin-Hyeok Jang@
1 : Photo-electronic Hybrids Research Center, Korea Institute of Science and Technology
Haweolgok-dong 39-1, Sungbuk-ku, Seoul -  South Korea

Strain-relaxed SiGe layer on Si substrate has numerous potential applications for electronic and opto-electronic devices. SiGe layer must have a high degree of strain relaxation and a low dislocation density. Conventionally, strain-relaxed SiGe on Si has been manufactured using compositionally graded buffers, in which thick SiGe buffers of several micrometers are grown on a Si substrate with Ge composition increasing from the Si substrate to the surface. Ion implantation is another method for achieving strain-relaxed SiGe layer on Si, i.e., Ge ion implantation on Si substrate followed by high temperature annealing.

In this study, a new plasma process, i.e., the combination of PIII&D and HiPIMS, was adopted to implant Ge ions into Si substrate. Due to the high peak power density applied the Ge sputtering target during the HiPIMS operation, a large fraction of sputtered Ge atoms is ionized. If the negative high voltage pulse applied to the sample stage in PIII&D system is synchronized with the pulsed Ge plasma, the ion implantation of Ge ions can be successfully accomplished.

The PIII&D system for Ge ion implantation on Si (100) substrate was equipped with two 3”-magnetron sputtering guns with Ge and Si target, which were operated with a HiPIMS power supply. The sample stage with Si substrate was pulse-biased using a separate hard-tube pulser. The HiPIMS pulse and substrate's negative bias pulse were synchronized at the same frequency of 150 Hz. The pulse voltage applied to the Ge sputtering target was -950 V and the pulse width was 50 usec. While operating the Ge sputtering gun in HiPIMS mode, a pulse bias of -50 kV was applied to the Si substrate. The pulse width was 40 usec with a 10 usec delay time with respect to the HiPIMS pulse. Ge ion implantation process was performed for 30 min. to achieve approximately 20 % of Ge concentration in Si substrate. Right after Ge implantation, ~50 nm thick Si capping layer was deposited to prevent oxidation during subsequent high-temperature annealing. The annealing was performed at 850 ℃ for 3 hours in N2 environment.

The Ge-implanted Si samples were analyzed using Auger electron spectroscopy, HR-XRD, and HR-TEM to investigate the depth distribution, the degree of strain relaxation, and the crystalline structure, respectively. The analysis results showed that strain-relaxed SiGe layer of ~80 nm thickness could be effectively formed on Si substrate by Ge ion implantation using the newly-developed PIII&D process for non-gaseous elements.


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